The formation of conductive vias in substrates such as glass suffers from a number of issues. Typically, the raw glass substrate is perforated through laser drilling or etching to form the desired vias. A dielectric lamination process then fills the vias in the etched or drilled raw glass substrate and coats the upper and lower surfaces of the substrate with laminated dielectric. The manufacturer must then employ a second drilling or etching process to reopen the dielectric-filled vias to form dielectric-lined vias. Plating the dielectric-lined vias with metal finishes the desired conductive vias. Because of the second drilling process, the formation of such conductive vias may be designated as a via-in-via process.
This second drilling process is problematic in that as the substrates are made ever thinner, it is desirable to also reduce the via diameters. But there is a considerable tolerance in the registration process used to align the substrate during the second drilling step such that the drilling may not be centered in each dielectric-filled via. For example, the alignment marks used on a glass substrate during the registration process are difficult to image due to the transparency of the glass. The off-centered drilling leaves a reopened via with a dielectric lining that is not uniform in thickness, which is undesirable when the reopened via is filled with metal because the metal won't be centered in the via. For example, FIG. 1A shows a conventional circular via 100, which was initially filed with laminated dielectric 105 and then re-drilled. Because of the tolerance in the registration process for aligning the second drilling, metal 110 deposited into the drilled dielectric 105 is off center with regard to a via center as defined by the substrate via wall 115. This is quite problematic as the tolerance could be such as to have no dielectric lining left along point A along substrate wall 115. This lack of dielectric lining leads to voids and metal deposition problems. As a result, there is a conventional limit to the aspect ratio (the ratio of the substrate thickness to the via diameter) that can be achieved by the via-in-via process. That limit in turn inhibits density because interconnect pitch cannot be reduced as the via-in-via process requires a relatively low aspect ratio such as 2:1. For example, the via diameter may need to be at least 100 microns if the substrate thickness is 200 microns. The resulting relatively-wide conductive vias thus inhibit density. In addition, the lamination of the dielectric onto the raw drilled substrate is problematic due to the physical force required during the lamination. This is especially problematic when glass substrates are laminated due to their fragility.
Accordingly, there is a need in the art for conductive vias that do not require the via-in-via process for their formation.